| 2. | This structure not only achieves the purpose of hardware logic partition but also makes it convenient for the generation of test stimulus , fault simulation , and online debugging . furthermore , we make internal scan share the test access port , so the pin ’ s cost which brings for test is reduced 此外为减少芯片引脚开销,我们还把内部扫描和边界扫描集成在一起,使其共用测试引脚,降低了因测试而带来的芯片引脚开销。 |